Low-energy ion implantation enables 2D lateral p-n junction construction

Low-energy ion implantation enables 2D lateral p-n junction construction

The feature size of silicon-based transistors is approaching the theoretical limit, which puts forward higher requirements for the atomic level manufacturing of semiconductors. The basic idea of atomic level manufacturing is to process and manipulate matters with atomic level precision, which will greatly reduce the power consumption of the chip and achieve a huge increase in the chip’s arithmetic power. The feature size of silicon-based transistors is approaching the theoretical limit, which puts forward higher requirements for the atomic level manufacturing of semiconductors. The basic idea of atomic level manufacturing is to process and manipulate matters with atomic level precision, which will greatly reduce the power consumption of the chip and achieve a huge increase in the chip’s arithmetic power. Nanophysics Nanomaterials Phys.org – latest science and technology news stories

Leave a Reply

Your email address will not be published. Required fields are marked *